#[repr(u8)]pub(crate) enum Feature {
Show 52 variants
aes,
pclmulqdq,
rdrand,
rdseed,
tsc,
mmx,
sse,
sse2,
sse3,
ssse3,
sse4_1,
sse4_2,
sse4a,
sha,
avx,
avx2,
avx512f,
avx512cd,
avx512er,
avx512pf,
avx512bw,
avx512dq,
avx512vl,
avx512ifma,
avx512vbmi,
avx512vpopcntdq,
avx512vbmi2,
gfni,
vaes,
vpclmulqdq,
avx512vnni,
avx512bitalg,
avx512bf16,
avx512vp2intersect,
f16c,
fma,
bmi1,
bmi2,
lzcnt,
tbm,
popcnt,
fxsr,
xsave,
xsaveopt,
xsaves,
xsavec,
cmpxchg16b,
adx,
rtm,
movbe,
ermsb,
_last,
}
stdsimd_internal
)Expand description
Each variant denotes a position in a bitset for a particular feature.
PLEASE: do not use this, it is an implementation detail subject to change.
Variants§
aes
stdsimd_internal
)AES (Advanced Encryption Standard New Instructions AES-NI)
pclmulqdq
stdsimd_internal
)CLMUL (Carry-less Multiplication)
rdrand
stdsimd_internal
)RDRAND
rdseed
stdsimd_internal
)RDSEED
tsc
stdsimd_internal
)TSC (Time Stamp Counter)
mmx
stdsimd_internal
)MMX (MultiMedia eXtensions)
sse
stdsimd_internal
)SSE (Streaming SIMD Extensions)
sse2
stdsimd_internal
)SSE2 (Streaming SIMD Extensions 2)
sse3
stdsimd_internal
)SSE3 (Streaming SIMD Extensions 3)
ssse3
stdsimd_internal
)SSSE3 (Supplemental Streaming SIMD Extensions 3)
sse4_1
stdsimd_internal
)SSE4.1 (Streaming SIMD Extensions 4.1)
sse4_2
stdsimd_internal
)SSE4.2 (Streaming SIMD Extensions 4.2)
sse4a
stdsimd_internal
)SSE4a (Streaming SIMD Extensions 4a)
sha
stdsimd_internal
)SHA
avx
stdsimd_internal
)AVX (Advanced Vector Extensions)
avx2
stdsimd_internal
)AVX2 (Advanced Vector Extensions 2)
avx512f
stdsimd_internal
)AVX-512 F (Foundation)
avx512cd
stdsimd_internal
)AVX-512 CD (Conflict Detection Instructions)
avx512er
stdsimd_internal
)AVX-512 ER (Expo nential and Reciprocal Instructions)
avx512pf
stdsimd_internal
)AVX-512 PF (Prefetch Instructions)
avx512bw
stdsimd_internal
)AVX-512 BW (Byte and Word Instructions)
avx512dq
stdsimd_internal
)AVX-512 DQ (Doubleword and Quadword)
avx512vl
stdsimd_internal
)AVX-512 VL (Vector Length Extensions)
avx512ifma
stdsimd_internal
)AVX-512 IFMA (Integer Fused Multiply Add)
avx512vbmi
stdsimd_internal
)AVX-512 VBMI (Vector Byte Manipulation Instructions)
avx512vpopcntdq
stdsimd_internal
)AVX-512 VPOPCNTDQ (Vector Population Count Doubleword and Quadword)
avx512vbmi2
stdsimd_internal
)AVX-512 VBMI2 (Additional byte, word, dword and qword capabilities)
gfni
stdsimd_internal
)AVX-512 GFNI (Galois Field New Instruction)
vaes
stdsimd_internal
)AVX-512 VAES (Vector AES instruction)
vpclmulqdq
stdsimd_internal
)AVX-512 VPCLMULQDQ (Vector PCLMULQDQ instructions)
avx512vnni
stdsimd_internal
)AVX-512 VNNI (Vector Neural Network Instructions)
avx512bitalg
stdsimd_internal
)AVX-512 BITALG (Support for VPOPCNT[B,W] and VPSHUFBITQMB)
avx512bf16
stdsimd_internal
)AVX-512 BF16 (BFLOAT16 instructions)
avx512vp2intersect
stdsimd_internal
)AVX-512 P2INTERSECT
f16c
stdsimd_internal
)F16C (Conversions between IEEE-754 binary16
and binary32
formats)
fma
stdsimd_internal
)FMA (Fused Multiply Add)
bmi1
stdsimd_internal
)BMI1 (Bit Manipulation Instructions 1)
bmi2
stdsimd_internal
)BMI2 (Bit Manipulation Instructions 2)
lzcnt
stdsimd_internal
)ABM (Advanced Bit Manipulation) / LZCNT (Leading Zero Count)
tbm
stdsimd_internal
)TBM (Trailing Bit Manipulation)
popcnt
stdsimd_internal
)POPCNT (Population Count)
fxsr
stdsimd_internal
)FXSR (Floating-point context fast save and restore)
xsave
stdsimd_internal
)XSAVE (Save Processor Extended States)
xsaveopt
stdsimd_internal
)XSAVEOPT (Save Processor Extended States Optimized)
xsaves
stdsimd_internal
)XSAVES (Save Processor Extended States Supervisor)
xsavec
stdsimd_internal
)XSAVEC (Save Processor Extended States Compacted)
cmpxchg16b
stdsimd_internal
)CMPXCH16B (16-byte compare-and-swap instruction)
adx
stdsimd_internal
)ADX, Intel ADX (Multi-Precision Add-Carry Instruction Extensions)
rtm
stdsimd_internal
)RTM, Intel (Restricted Transactional Memory)
movbe
stdsimd_internal
)MOVBE (Move Data After Swapping Bytes)
ermsb
stdsimd_internal
)ERMSB, Enhanced REP MOVSB and STOSB
_last
stdsimd_internal
)